This invention relates generally to bias generator circuits for generating a bias voltage for a semiconductor substrate layer of an integrated circuit, and more particularly to a circuit and method for reducing the amount of standing current required by the bias generator.
A technique for improving the performance of an integrated circuit formed on a substrate such as a memory device is to provide a separate bias voltage to the substrate instead of coupling the substrate to the five volt power supply (V.sub.DD) or ground, as appropriate. The value of the bias voltage is negative for P-type substrates or wells and is greater than V.sub.DD for N-type substrates or wells. The substrate bias voltage is typically generated with an on-chip circuit containing a charge pump. When the substrate or well voltage changes from a nominal value due to a change in the operating condition of the integrated circuit, a sense circuit provides a control voltage to turn on the charge pump. In turn, the charge pump pumps charge into or out of the substrate until the substrate or well voltage returns to the nominal value. The sense circuit then provides a control voltage to turn off the charge pump.
Prior art bias generator circuits draw a significant standing current that flows directly into the substrate. This standing current directly and indirectly increases the power requirements of the bias generator circuit. In the case of a P-type substrate or well, the additional current raises the substrate voltage. Therefore, the charge pump must be turned on more frequently to maintain a nominal substrate voltage. Since the charge pump is typically only 25-35% efficient, an additional 1 .mu.A of current flowing in the sense circuit translates to an additional 3-4 .mu.A of current that must be consumed by the charge pump. Typically, 5 .mu.A of current is required by the sense circuit to maintain a reasonably short delay time to respond to changes in the substrate voltage. Thus, a total of 20-25 .mu.A of additional standby current is consumed by the bias generator circuit.
One simple way to reduce the current requirements of the bias generator circuit is to decrease the current flowing through the sense circuit. Such a decrease in current, however, produces a corresponding undesirable increase in the delay time in response to changes in the substrate voltage. Thus, the accuracy of the regulated substrate voltage decreases resulting in decreased performance and, possibly, latch-up of the integrated circuit.
What is desired is a bias generator circuit for regulating the voltage of a substrate on an integrated circuit having a low standing current requirement yet maintaining a reasonable delay time in responding to changes in the substrate voltage.